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Engineering (General) jobs

161 live jobs

NXP SemiconductorsVerified

DDR Functional Validation Engineer

United States

Est. $63K–$135K/yrOn-siteMid level10+ yrs

Posted 22d agochecked 5d ago

NXP SemiconductorsVerified

SoC Validation Engineer

United States

Est. $63K–$135K/yrOn-siteMid level10+ yrs

Posted 22d agochecked 5d ago

NXP SemiconductorsVerified

Sr. Tape Out Engineer

Location not specified

On-siteSeniorFlexible hoursFlexible hours

Posted 23d agochecked 5d ago

NXP SemiconductorsVerified

Principal Tape Out Engineer

Location not specified

On-siteStaff / PrincipalFlexible hoursFlexible hours

Posted 23d agochecked 5d ago

Jobs | JobRipe

Region

Country

Shifts and starting

Verified employers onlyShows salaryVisa sponsorshipHide stale or evergreen listings

Posted

Experience asked for

Apply method

Source

Minimum yearly salary

In the job's own currency. Only jobs that publish pay are matched.

Work setup

Field

Skills

Level

Company

Job type

Company size

Education

Benefits

Languages

Engineering (General) jobs

161 live jobs

NXP SemiconductorsVerified

DDR Functional Validation Engineer

United States

Est. $63K–$135K/yrOn-siteMid level10+ yrs

Posted 22d agochecked 5d ago

NXP SemiconductorsVerified

SoC Validation Engineer

United States

Est. $63K–$135K/yrOn-siteMid level10+ yrs

Posted 22d agochecked 5d ago

NXP SemiconductorsVerified

Sr. Tape Out Engineer

Location not specified

On-siteSeniorFlexible hoursFlexible hours

Posted 23d agochecked 5d ago

NXP SemiconductorsVerified

Principal Tape Out Engineer

Location not specified

On-siteStaff / PrincipalFlexible hoursFlexible hours

Posted 23d agochecked 5d ago

Engineering (General) jobs

DDR Functional Validation Engineer

SoC Validation Engineer

Sr. Tape Out Engineer

Principal Tape Out Engineer

Engineering (General) jobs

DDR Functional Validation Engineer

SoC Validation Engineer

Sr. Tape Out Engineer

Principal Tape Out Engineer

System Performance Engineer

Stage Ingénieur : Analyste d'affaires (F/H)

Stage Ingénieur : Analyste de données (F/H)

PSE Technician

ENTRY LEVEL - SYSTEMS & APPLICATIONS ENGINEER

AI Verification Engineering Intern

Sr. Principal Field Applications Engineer

Stage Ingénieur : Validation Labo PMIC (F/H)

(Senior) RF Engineer mmW Innovation (f/m/d)

Lead DFT Engineer

Stage Ingénieur : Génération semi-automatique de modèles, stimuli et testbenches par agents IA (F/H)

Stage Ingénieur : Génération de VIP et d’assertions pour IP mixtes par agents IA (F/H)

Junior DfT Design Engineer - MCU

Senior Mixed Signal Verification Engineer

Stage d’ingénieur : Automatisation des tâches de sûreté de fonctionnement (Functional Safety) (F/H)

Digital IP Design Engineer (f/m/d)